[FOR TEST ONLY] Add extra patches from whitebelyash's turnip/gen8 branch - #94
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lfdevs wants to merge 24 commits into
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[FOR TEST ONLY] Add extra patches from whitebelyash's turnip/gen8 branch#94lfdevs wants to merge 24 commits into
turnip/gen8 branch#94lfdevs wants to merge 24 commits into
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Judging by the existing tests these are very similar to A730 and can work with its props with some bugs Signed-off-by: whitebelyash <whbexiumwork@gmail.com>
This can help running games where the Turnip driver might not be known, preventing them from running. Some games might also make adjustments to graphics settings if they detect the SteamDeck. Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com> Signed-off-by: whitebelyash <whbexiumwork@gmail.com>
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u_gralloc checks if the current buffer was allocated by the Qualcomm vendor gralloc by comparing 'gmsm' magic with the buffer data. Since newer gralloc versions this way isn't working anymore, causing the condition to never success - essentially skipping setting proper DRM format modifier. This caused huge distorted picture on the screen because the allocated buffer never got a proper modifier as it should have Signed-off-by: whitebelyash <whbexiumwork@gmail.com>
Disables GMEM usage completely, effectively same thing as TU_DEBUG=sysmem Signed-off-by: whitebelyash <whbexiumwork@gmail.com>
Cache sizes for 810&825 should be valid. 829 is unknown, but works so far(?) Signed-off-by: whitebelyash <whbexiumwork@gmail.com>
Allows Minecraft to run on GPUs without multiview. The game requires Vulkan 1.2, Turnip exposes only VK1.0 on some devices (e.g. VK1.0). The change makes it expose VK1.3. This is not conformant. I know, I'm not a kid. UPD. VK1.3 is already exposed with specific debug env, however, it's not always possible to enforce it
Signed-off-by: DVD <dmitrijnemov13@gmail.com> Add bool gmem_size Signed-off-by: DVD <dmitrijnemov13@gmail.com> Fixing a compilation error Moved gmem_size to props structure in freedreno_dev_info.h Signed-off-by: DVD <dmitrijnemov13@gmail.com> Adjust tile alignment widths and heights in freedreno_devices Signed-off-by: DVD <dmitrijnemov13@gmail.com> Update GPUProps for a8xx with new features Signed-off-by: DVD <dmitrijnemov13@gmail.com> Update gmem_per_ccu_depth_cache_size value for A829 Changed gmem_per_ccu_depth_cache_size from 192KB to 128KB. Signed-off-by: DVD <dmitrijnemov13@gmail.com> Update freedreno_devices.py Signed-off-by: DVD <dmitrijnemov13@gmail.com> Change gmem_per_ccu_depth_cache_size to 128KB Signed-off-by: DVD <dmitrijnemov13@gmail.com> Update GPU memory cache settings in freedreno_devices.py Signed-off-by: DVD <dmitrijnemov13@gmail.com> Change color and depth cache fractions to HALF Signed-off-by: DVD <dmitrijnemov13@gmail.com> Adjust sysmem per CCU depth cache size Signed-off-by: DVD <dmitrijnemov13@gmail.com> Adjust memory cache sizes and tile alignment Signed-off-by: DVD <dmitrijnemov13@gmail.com> Change tile width alignment from 64 to 96 Signed-off-by: DVD <dmitrijnemov13@gmail.com> Adjust cache fraction and tile alignment values Signed-off-by: DVD <dmitrijnemov13@gmail.com>
Signed-off-by: DVD <dmitrijnemov13@gmail.com> A810 reg_size 96 Signed-off-by: DVD <dmitrijnemov13@gmail.com>
Hacks hacks hacks, ignore below squash messages Add chip-specific codegen profiles for Adreno 8xx series with: - Reduced max_unroll_iterations (16-32 based on tier) - Aggressive FP16 lowering for bandwidth-limited GPUs - Register pressure scaling (70-100%) to reduce spills - Minimized barriers on A830/A840 for better throughput - Optimized delay slots (alu_to_alu=2, non_alu=5, cat3_src2_read=1) Profiles per GPU: - A810: unroll=16, reg_scale=70%, barriers=min, vectorize=yes - A825: unroll=24, reg_scale=85%, barriers=min, vectorize=yes - A829: unroll=26, reg_scale=85%, barriers=min, vectorize=yes - A830: unroll=32, reg_scale=100%, barriers=keep, vectorize=yes - A840: unroll=32, reg_scale=100%, barriers=keep, vectorize=yes Known to be generated with an LLM. Signed-off-by: DVD <dmitrijnemov13@gmail.com> Fix black screen Signed-off-by: DVD <dmitrijnemov13@gmail.com> Relocation from Old Mesa Signed-off-by: DVD <dmitrijnemov13@gmail.com> Update from old mesa Signed-off-by: DVD <dmitrijnemov13@gmail.com> Update from old mesa banch Signed-off-by: DVD <dmitrijnemov13@gmail.com>
Per Mesa talks this one is generally useful for Android native applications (i.e. TBR optimized), however, it's useless or even bad for anything IMR/PC. Let's disable this.
These values were taken from A825 dumps, since A829 and A825 are quite similar, so I assumed that the offset: gmem_vpc_bv_pos_buf_size = 32768,
…25,829,830 As practice has shown, this gives an increase in dx12 games, but does not provide any increase in dx11 In games, artifacts don't appear. This applies to the A810-830, I think because they have the same blob. That is, there's no increase on the A840.
We want the ability to know whether or not a descriptor can be speculatively prefetched, separate or not from whether the instruction consuming the descriptor can be speculated. For example, it would be nonsensical to mark an SSBO store/atomic as CAN_SPECULATE, but we could still speculate the descriptor.
In preparation for no longer assuming this in core ir3.
This will be used to see if loads can be speculatable.
Determine from the Vulkan descriptor set information whether descriptor loads can be speculated and whether SSBO/UBO/texture loads can be speculated. This has no impact yet, but will once ir3 starts relying on producers for speculatability.
These are always speculatable. In preparation for ir3 considering speculatability correctly.
Now that producers set it, stop setting it on everything. Base descriptor speculatability on the information in ir3_bindless_resource now that it is plumbed through.
We may not be able to lower UBOs to consts if the descriptor set may be partially bound in Vulkan. Consider speculability to fix this. Since opt_preamble can correctly conditionalize these non-speculatable loads, change the heuristic to let opt_preamble handle them at the cost of a somewhat larger/slower preamble.
The early preamble may execute even when the shader never does, in which case the user is allowed to set arbitrary state since from the API point of view no invocations execute. This means that we cannot allow accesses that are not speculatable in early preambles, since they could cause faults. We've already plumbed through speculatability throughout ir3, so use it to disable early preamble when necessary.
Update freedreno_devices.py Snapdragon 4 gen 2 a613 unofficial support compiled for termux mesa it worked while forcing vulkan 1.4 specialised build and just 1.3 force from ifdevs source now testing for emulator normal version no forcing anything because this source does that already i guess I saw some commit
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These patches are from
turnip/gen8branch of whitebelyash's repo: https://github.com/whitebelyash/mesa-unified/tree/turnip/gen8 They may provide special optimizations for gaming scenarios (especially Adreno 8XX).Current HEAD: whitebelyash/mesa-unified@7fdde2f