Skip to content

LATX, opt: Add configurable Jcc instruction patterns - #443

Open
y347812075 wants to merge 8 commits into
lat-opensource:masterfrom
y347812075:perf-wi-2233
Open

LATX, opt: Add configurable Jcc instruction patterns#443
y347812075 wants to merge 8 commits into
lat-opensource:masterfrom
y347812075:perf-wi-2233

Conversation

@y347812075

Copy link
Copy Markdown
Contributor

Summary

  • decouple instruction-pattern opcodes from runtime option bits and add strict 64-bit mask parsing and statistics
  • add adjacent ADD, SAR/SHR, OR, XOR, and DEC result-to-Jcc patterns, and extend safe conditions for existing patterns
  • add the OR_XX_JCC pilot across safe intermediate instructions, including EFLAGS recovery on exception paths
  • keep every new pattern independently selectable and disabled by the legacy default mask

Commit series

  1. LATX, refactor: Decouple instruction pattern options
  2. LATX, opt: Add adjacent ADD and Jcc pattern
  3. LATX, opt: Add SAR and extend SHR Jcc patterns
  4. LATX, opt: Add adjacent OR and Jcc pattern
  5. LATX, opt: Expand safe Jcc pattern conditions
  6. LATX, opt: Add OR XX Jcc pattern
  7. LATX, opt: Add adjacent XOR and Jcc pattern
  8. LATX, opt: Add adjacent DEC and Jcc pattern

Validation

  • release, debug, and no-pattern-check builds
  • instruction-pattern option parsing, statistics, rejection, and fork semantics
  • directed integration tests for all eight commits, including operand widths, flags, faults, LOCK handling, rollback, TU, unlink, and AOT paths
  • git diff --check
  • strict checkpatch.pl on each commit: no errors; only the generic MAINTAINERS warning caused by adding integration test files
  • targeted code-generation checks show fewer host instructions for the newly enabled patterns; directed microbenchmarks show an optimization effect for each new pattern

Tracking

AgentsFlow: P-18 / T-298

Separate pattern opcodes from the runtime option mask and extend the mask to
64 bits while preserving the legacy default bits.

Add strict option parsing and common match, rejection, EFLAGS fallback, IR2,
and host instruction statistics. Cover configuration priority, invalid input,
pattern rollback, and fork behavior.

Signed-off-by: yuerengan <y347812075@163.com>
Fuse adjacent ADD with JE, JNE, JS, or JNS and branch directly on the computed
result when the remaining flags are dead.

Keep live EFLAGS, memory fault, LOCK, TU, unlink, and AOT behavior on the
existing paths. Add width, operand, rollback, and code generation coverage.

Signed-off-by: yuerengan <y347812075@163.com>
Add adjacent SAR with JE, JNE, JS, or JNS and extend SHR with safe zero-result
conditions. Reject zero effective shift counts so the original flags remain
unchanged.

Cover operand widths, count boundaries, live flags, faults, TU, unlink, AOT,
rollback, and code generation.

Signed-off-by: yuerengan <y347812075@163.com>
Fuse adjacent OR with JE, JNE, JS, or JNS and branch directly on the logical
result while retaining the normal EFLAGS fallback when flags remain live.

Add register, immediate, memory, fault, LOCK, TU, unlink, AOT, rollback, and
code generation coverage for all operand widths.

Signed-off-by: yuerengan <y347812075@163.com>
Extend the existing CMP, SUB, AND, and SHR result-branch patterns with the
additional conditions that can be derived safely from their translated
results.

Reuse the existing translators and operand paths instead of adding parallel
pattern implementations. Cover signed boundaries, overflow, flags, TU,
unlink, AOT, and rollback behavior.

Signed-off-by: yuerengan <y347812075@163.com>
Fuse OR with a later Jcc across safe intermediate instructions and retain the
logical result in the existing pattern temporary.

Restore OR-defined flags from the retained result on exception paths and keep
unsafe crossings on the ordinary translation path. Cover signal recovery,
faults, TU, unlink, AOT, rollback, and code generation.

Signed-off-by: yuerengan <y347812075@163.com>
Fuse adjacent XOR with JE, JNE, JS, or JNS and branch directly on the logical
result. Rebuild live XOR flags from the result without using XOR of the result
with itself.

Cover all operand widths, register clearing, memory, faults, LOCK, TU, unlink,
AOT, rollback, and code generation.

Signed-off-by: yuerengan <y347812075@163.com>
Fuse adjacent register DEC with JE or JNE and branch directly on the truncated
decremented result.

Keep DEC distinct from SUB so live flags preserve the incoming carry flag.
Cover all operand widths, CF and overflow boundaries, memory fallback, TU,
unlink, AOT, rollback, and code generation.

Signed-off-by: yuerengan <y347812075@163.com>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant