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| * | ||
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| int aes_setkey(FAR AES_CTX *ctx, FAR const uint8_t *key, int len) |
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should we implement as crypto driver?
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Yes. And it found a bug: my file and crypto/aes.c define the same five functions, so both on will not link.
aes_cypher() avoids that, like stm32h7 and esp32, but then only /dev/crypto gets it, not xform.c. Prefer that?
NuttX emits no AES instruction on any arm64 core. There is no runtime feature dispatch in arch/arm64, so every AES goes through crypto/rijndael.c or crypto/aes.c, and the table-driven one indexes memory with key-dependent values, so its timing follows the cache. Provide aes_cypher() for ECB, CBC and CTR built on AESE, AESD and the MixColumns pair, and register it with /dev/crypto as a hardware driver alongside the existing stm32h7, sam34 and esp32 modules. ID_AA64ISAR0_EL1.AES is read on every call, which returns -ENOTSUP rather than trapping on a core without the extension. Verified against the NIST SP 800-38A appendix F vectors for ECB-128, ECB-256, CBC-128, CBC-192 and CTR-128, encrypt and decrypt, in place and out of place. Signed-off-by: Royyan Zahir <royzah@gmail.com>
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Summary
NuttX emits no AES instruction on any core. arm64 has no runtime feature dispatch, so a part that implements the Cryptography Extension still runs the table version in https://github.com/apache/nuttx/blob/master/crypto/rijndael.c, which indexes eight 256-entry tables with key-dependent values and therefore has cache-dependent timing.
This provides the
crypto/aes.hblock operations withAESE,AESDand the MixColumns pair, behindCONFIG_ARM64_CRYPTO_AES.ID_AA64ISAR0_EL1.AESis read at key setup, so a core without the extension gets a failedaes_setkeyrather than an undefined instruction.Two points for review:
AESEwith a zero round key. That only yields the substituted word if ShiftRows has nothing to move, so the word is replicated across all four columns first.InvMixColumnsis folded into the middle round keys at setup, so the block path is the same shape as encryption.Impact
arm64, opt-in, off by default. New file, no existing behaviour changes.
crypto/rijndael.cis untouched and remains whatxform.cuses.Testing
Verified against the FIPS-197 appendix C vectors for 128, 192 and 256 bits, both directions, executing the instructions under
qemu-aarch64:tools/nxstyleclean.Owed before ready: throughput against the table version on a real part, and a boot log. Both need hardware this branch does not have.