Hi OpenBCI,
I have a question about the SPI bus for the accelerometer in the Cyton board.
Why do we need an OR gate between the MOSI and CS pins? As far as I understand, the OR gate will help us to ignore any command from the SPI bus if CS is still high. But I thought it should be an internal SPI function of the accelerometer? And why don't we apply the OR gate to other SPI devices?
Thank you.
Hi OpenBCI,
I have a question about the SPI bus for the accelerometer in the Cyton board.
Why do we need an OR gate between the MOSI and CS pins? As far as I understand, the OR gate will help us to ignore any command from the SPI bus if CS is still high. But I thought it should be an internal SPI function of the accelerometer? And why don't we apply the OR gate to other SPI devices?
Thank you.