Add frequency calculations to CAN, SPI, I2C, I2S, UART links - #549
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Pull request overview
This PR extends the electronics interface layer with negotiated/validated rate parameters for multiple digital protocols (CAN, SPI, I2C, I2S, UART), updates device/MCU port models to provide realistic limits, and adds unit tests to validate compatibility checks and nested-connection behavior.
Changes:
- Add link-level range negotiation + compatibility requirements (eg, SPI frequency_limit, UART baud_limit, CAN bitrate_limit, I2S sample_rate_limit/bit_limit).
- Update MCU pinmap models and device interface parts to set protocol limit parameters consistently.
- Add new unit tests for UART/SPI/I2S/CAN link inference and expand I2C tests for nested structure + frequency negotiation.
Reviewed changes
Copilot reviewed 23 out of 23 changed files in this pull request and generated 3 comments.
Show a summary per file
| File | Description |
|---|---|
| examples/test_deskcontroller.py | Updates UART port models to include explicit baud limits and link propagation through the level shifter. |
| edg/parts/microcontroller/Stm32g431.py | Adds I2S model limits and reuses a shared I2S controller model in the pinmap. |
| edg/parts/microcontroller/Stm32g031.py | Adds I2S model limits and applies them to the I2S peripheral resource. |
| edg/parts/microcontroller/nRF52840.py | Updates I2S model to sample-rate + bit-resolution limits. |
| edg/parts/microcontroller/Esp32s3.py | Updates I2S model to sample-rate + bit-resolution limits derived from bitrate. |
| edg/parts/microcontroller/Esp32c3.py | Updates I2S model to sample-rate + bit-resolution limits derived from bitrate. |
| edg/parts/interface/UsbUart_Cp2102.py | Adds an explicit UART baud_limit for the CP2102 UART port. |
| edg/parts/interface/CanTransceiver_Sn65hvd230.py | Adds CAN bitrate limits to the controller-side port and propagates them to the bus-side port. |
| edg/parts/interface/CanTransceiver_Iso1050.py | Adds CAN bitrate limits to the controller-side port and propagates them to the bus-side port. |
| edg/parts/human_interface/SpeakerDriver_Max98357a.py | Adds explicit I2S sample-rate + bit-resolution limits to the target receiver port. |
| edg/parts/display/oled/Er_Oled_096_1c.py | Replaces legacy/empty I2C/SPI ports with constrained models (addresses + frequency). |
| edg/electronics_interfaces/UartPort.py | Adds baud_limit negotiation/checking to the UART link. |
| edg/electronics_interfaces/test_uart_link.py | Adds UART link tests including baud negotiation + invalid-range failure. |
| edg/electronics_interfaces/test_spi_link.py | Adds SPI link tests including shared-bus frequency negotiation + invalid-range failure. |
| edg/electronics_interfaces/test_i2s_link.py | Adds I2S link tests for sample-rate and bit-resolution negotiation + invalid cases. |
| edg/electronics_interfaces/test_i2c_link.py | Extends I2C tests with frequency negotiation and nested-bus structure cases. |
| edg/electronics_interfaces/test_can_link.py | Adds CAN link tests for logic-link and diff-bus bitrate negotiation + invalid cases. |
| edg/electronics_interfaces/SpiPort.py | Adds link-level frequency_limit negotiation/checking to SPI links. |
| edg/electronics_interfaces/MergedBlocks.py | Updates SPI merged-controller generation to instantiate typed peripherals and propagates frequency_limit. |
| edg/electronics_interfaces/I2sPort.py | Replaces I2S bitrate-based modeling with sample_rate_limit and bit_limit negotiation/checking. |
| edg/electronics_interfaces/I2cPort.py | Renames I2C link frequency parameter to frequency_limit and enforces non-empty compatible ranges. |
| edg/electronics_interfaces/CanPort.py | Adds bitrate_limit negotiation/checking for CAN logic and diff links, including bridge propagation. |
| edg/core/Blocks.py | Renames require(..., unchecked=) to require(..., _unchecked=) for internal structural-bypass usage. |
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| self.controller = self.Block(I2sControllerBlock(sample_rate_limit=(0, 8) * Bit)) | ||
| self.target = self.Block(I2sTargetReceiverBlock(sample_rate_limit=(16, 16) * Bit)) |
| check_subexpr(subexpr) | ||
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| def require(self, constraint: BoolLike, name: Optional[str] = None, *, unchecked: bool = False) -> BoolExpr: | ||
| def require(self, constraint: BoolLike, name: Optional[str] = None, *, _unchecked: bool = False) -> BoolExpr: |
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Adds frequency calculation and compatibility checks to digital protocol ports. Adds unit tests, including for connection structure.
Redefines I2S as sample rate and bits, which is a stronger check.
Update device models to use new terminology and structure. Fixes some device models that were using
.empty()when only their internal subports needed to be.empty()Infrastructure changes:
requirearg is now_uncheckedas internal only kwargPartly API breaking. Any uses of eg
I2cTarget.empty()will result in the frequency fields unpopulated unless propagated by inner connections or explicitly assigned. Empty frequency fields produce an error.Contributor License Agreement
By submitting this pull request, I agree to dual-license this contribution under both BSD 3-clause and Apache License, Version 2.0.